1. Field of the Invention
The present invention generally concerns computer busses and corresponding configuration methods, and in more particular concerns a scheme for representing the configuration of computer busses using object oriented abstractions.
2. Background Information
A typical computer platform, such as a personal computer, workstation, or server, generally includes one type of primary or “root” bus that is used for communicating with various peripheral devices, such as the PCI bus in newer computers, and the ISA bus in earlier PCs. Other well-known earlier busses include the EISA bus and the Micro-channel bus. These earlier busses are known as “legacy” busses.
A primary problem with legacy busses is that they are difficult to configure. This was one of the motivations for developing the PCI bus, which introduced “plug and play” functionality. Plug and play functionality enables operating systems and other computer software and hardware to become apprised of a PCI peripheral's capabilities and characteristics. For example, on a first reboot an operating system may be able to determine that a PCI card that was installed prior to the reboot is a video card or modem with certain characteristics, and may further automatically configure the device, including identifying appropriate device drivers. This has enhanced usability of computers with PCI buses, especially when the computers are used by people with little or no technical background.
While configuring PCI devices on a signal root bus is generally handled well by today's computers, it is anticipated that more powerful computers and servers will be introduced that support a variety of different interface and peripheral types through the use of multiple root busses. In some configurations, these root busses may comprise fundamentally different types of root busses. At present, the particular requirements of the chipset that control the each root bus are usually needed to configure the bus. In more particular, it is usually necessary to determine access mechanisms, resource constraints, I/O access mechanisms and/or parent-child relationships to configure the bus. With the introduction of the Intel 870 chipset, Infiniband bus protocol, and IA-64, the process for controlling and configuration root busses will likely become even more complicated.